- To understand the behavior and demonstrate Half subtractor using basic gates.
- To apply knowledge of the fundamental gates to create truth tables.
- To develop digital circuit building and troubleshooting skills.
- To understand key elements of TTL logic specification or datasheets.

IC Number | IC Name |
---|---|

74LS04 | Hex Inverting Gates |

74LS08 | Quad 2-input AND Gates |

74LS86 | Quad 2-input Exclusive-OR Gates |

- Place the IC on IC Trainer Kit.
- Connect VCC and ground to respective pins of IC Trainer Kit.
- Implement the circuit as shown in the circuit diagram.
- Connect the inputs to the input switches provided in the IC Trainer Kit.
- Connect the outputs to the switches of O/P LEDs
- Apply various combinations of inputs according to the truth table and observe the condition of LEDs.
- Note down the corresponding output readings for various combinations of inputs.
- Power Off Trainer Kit, disconnect all the wire connections and remove IC's from IC-Base.

**HALF SUBTRACTER - ** The circuit, which performs the subtraction of two binary numbers is known as Binary subtractor. Half subtractor is the most essential combinational logic circuit which is used in digital electronics. Basically, this is an electronic device or in other terms, we can say it as a logic circuit. Half subtractor is used to perform two binary digits subtraction.

In half subtraction, the process of subtraction is similar to arithmetic subtraction. In arithmetic subtraction the base 2 number system is used whereas in binary subtraction, binary numbers are used for subtraction. The resultant terms can be denoted with the difference and borrow.

As in binary subtraction, the major digit is 1, we can generate borrow while the subtrahend 1 is superior to minuend 0 and due to this, borrow will need.

- Make the connections according to the IC pin diagram.
- The connections should be tight on trainer kit.
- The Vcc and ground should be applied carefully at the specified pin only.

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#### Aim: To study and verify the Full Adder using NAND Gates.

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#### Aim: To study and verify the Half Adder using NAND Gates.

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#### Aim: To study and Verify the Full Adder function using 3:8 Decoder.

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#### Aim: To study and Verify the Full Subtractor using Two half adders basic gates.

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#### Aim: To study and verify the Half Adder Using Basic Gates.

**ICs used**: 74LS8674LS08